The present disclosure relates to a decoupling circuit and a semiconductor device including the same.
Because of increases of an integration density and an operating speed of a semiconductor device, power noise generated in a chip may considerably affect the operation of the chip. In order to reduce the power noise, many kinds of decoupling devices, including decoupling capacitors, are being used. Accordingly, an area occupied by the decoupling devices is continuously increased in the chip.
Among decoupling devices, a decoupling capacitor may be connected between a power supply, for example, an external power voltage, and a ground voltage VSS, to reduce AC noise by short-circuiting an AC signal, while maintaining a DC signal. Here, capacitance of the decoupling capacitor is proportional to an area occupied by the capacitor. Minimizing power noise may be achieved by maximizing capacitance through increased use of cell type decoupling capacitors, which usually have the characteristics of large capacitance.
While using a 1-stage cell type capacitor may maximize capacitance per unit, the reliability may be lowered by an increase in the voltage difference applied to opposite ends of the capacitor. Thus, in a case of using a multi-stage cell type capacitor to enhance reliability, the overall capacitance may be reduced.